A varactor (variable-reactance) diode exhibits a change in capacitance as a function of bias voltage. In metal-semiconductor varactors, a Schottky junction is used to realize variable capacitance--the capacitance is determined by the depletion layer depth, which is in turn controlled by the junction bias voltage. That is, the depletion layer acts as an insulating dielectric of variable width between the capacitor formed by the anode and cathode. Examples of the use of varactors include microwave applications as variable reactance devices for harmonic generation, parametric amplification, and electronic tuning.
Most solid state varactor diodes use a vertical structure in which the anode and cathode are on opposite sides of a doped, or active, semiconductor layer, with the depth of the depletion region relative to the active layer (i.e., the distance between the anode and cathode) depending upon the reverse-bias voltage on the anode. The dimensions and doping of the active layer are controlled so that, for the operational bandwidth, the depletion region under the varactor anode does not reach the lower boundary of the active layer (i.e., the cathode), a condition called punch-through where varactor capacitance and Q factor decrease abruptly (non-linearly).
Varactor diodes can be fabricated into metal-semiconductor field effect transistor (MESFET) integrated circuits by using a lateral varactor structure in which the Schottky-contact anode and the ohmic-contact cathode are deposited onto the surface of the active layer of the semiconductor substrate (formed by epitaxy or implant). In this lateral configuration, varactor capacitance is determined by the depth of the depletion layer, together with a sidewall capacitance component determined by the lateral expansion of the depletion layer sidewall toward the cathode. The sidewall capacitance component becomes predominant in determining varactor performance after punch-through.
A fundamental problem in fabricating lateral varactor diodes in MESFET integrated circuits is that optimizing MESFET performance requires a shallow active layer with a sharply defined lower boundary. However, a shallow active layer means that achieving a reasonable bandwidth for varactor tuning requires that the varactor be tuned through punch-through, resulting in sharply degraded capacitance (C-V) and Q (Q-V) characteristics at the punch-through point where small variations in anode bias cause substantial changes in capacitance and Q. For example, broad band monolithic voltage-controlled oscillator (VCO) circuits fabricated using GaAs MESFET integrated circuit technology have a gap at mid-range tuning frequencies due to this effect ("Monolithic Voltage Controlled Oscillator for X and Ku-B Bands," B. N. Scott, et al., 1982, IEEE Microwave Theory and Techniques Symposium Digest).
One approach used to avoid the punch-through tuning problem for lateral varactors is to implant a deep active layer beneath the anode, completely surrounding the cathode side of the depletion region ("An Analog X-B Band Phase Shifter," D. E. Dawson, et al., 1984, IEEE Microwave and mm-Wave Monolithic Circuits Symposium Digest of Papers). This lateral varactor structure allows the active layer to be optimized for MESFET fabrication, while increasing varactor tuning bandwidth by allowing the varactor to be tuned from its upper capacitance limit to its lower limit without passing through punch-through (i.e., without causing the depth of the depletion layer to exceed the depth of the implanted active region under the anode). However, this approach is disadvantageous in that it requires a complex implant process--for simplified, low cost fabrication, the varactor should be fabricated using the same active layer and lithography steps as the transistors.
Accordingly, a need exists for an improved solid state lateral varactor structure to achieve a broader varactor tuning range in which abrupt changes in capacitance (and Q) are minimized. Preferably, the lateral varactor structure could be fabricated using MESFET integrated circuit technology with an active layer optimized for MESFET performance.